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Advances in Computer Systems Architecture

12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings

  • Conference proceedings
  • © 2007

Overview

Editors:
  1. Lynn Choi
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  2. Yunheung Paek
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  3. Sangyeun Cho
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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 4697)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Included in the following conference series:

Conference proceedings info: ACSAC 2007.

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Table of contents (36 papers)

  1. Front Matter

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  2. A Compiler Framework for Supporting Speculative Multicore Processors

    • Pen-Chung Yew
    Pages 1-1

  3. Power-Efficient Heterogeneous Multicore Technology for Digital Convergence

    • Kunio Uchiyama
    Pages 2-3

  4. StarDBT: An Efficient Multi-platform Dynamic Binary Translation System

    • Cheng Wang, Shiliang Hu, Ho-seop Kim, Sreekumar R. Nair, Mauricio Breternitz Jr., Zhiwei Ying et al.
    Pages 4-15

  5. Unbiased Branches: An Open Problem

    • Arpad Gellert, Adrian Florea, Maria Vintan, Colin Egan, Lucian Vintan
    Pages 16-27

  6. An Online Profile Guided Optimization Approach for Speculative Parallel Threading

    • Yuan Liu, Hong An, Bo Liang, Li Wang
    Pages 28-39

  7. Entropy-Based Profile Characterization and Classification for Automatic Profile Management

    • Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, Sreekumar R. Nair, Robert Y. Geva
    Pages 40-51

  8. Laplace Transformation on the FT64 Stream Processor

    • Yu Deng, Xuejun Yang, Xiaobo Yan, Kun Zeng
    Pages 52-62

  9. Towards Data Tiling for Whole Programs in Scratchpad Memory Allocation

    • Lian Li, Hui Wu, Hui Feng, Jingling Xue
    Pages 63-74

  10. Evolution of NAND Flash Memory Interface

    • Sang Lyul Min, Eyee Hyun Nam, Young Hee Lee
    Pages 75-79

  11. FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs

    • Dong Wang, Xiaowen Chen, Shuming Chen, Xing Fang, Shuwei Sun
    Pages 80-89

  12. Exploiting Single-Usage for Effective Memory Management

    • Thomas Piquet, Olivier Rochecouste, André Seznec
    Pages 90-101

  13. An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories

    • Kang Yi, Shih-Yang Cheng, Young-Hwan Park, Fadi Kurdahi, Ahmed Eltawil
    Pages 102-113

  14. An Effective Design of Master-Slave Operating System Architecture for Multiprocessor Embedded Systems

    • Minyeol Seo, Ha Seok Kim, Ji Chan Maeng, Jimin Kim, Minsoo Ryu
    Pages 114-125

  15. Optimal Placement of Frequently Accessed IPs in Mesh NoCs

    • Reza Moraveji, Hamid Sarbazi-Azad, Maghsoud Abbaspour
    Pages 126-138

  16. An Efficient Link Controller for Test Access to IP Core-Based Embedded System Chips

    • Jaehoon Song, Hyunbean Yi, Juhee Han, Sungju Park
    Pages 139-150

  17. Performance of Keyword Connection Algorithm in Nested Mobility Networks

    • Sang-Hoon Ryu, Doo-Kwon Baik
    Pages 151-162

  18. Leakage Energy Reduction in Cache Memory by Software Self-invalidation

    • Kiyofumi Tanaka, Takenori Fujita
    Pages 163-174

  19. Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters

    • Daniel C. Vanderster, Amirali Baniasadi, Nikitas J. Dimopoulos
    Pages 175-185

  20. Runtime Performance Projection Model for Dynamic Power Management

    • Sang-Jeong Lee, Hae-Kag Lee, Pen-Chung Yew
    Pages 186-197
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About this book

On behalf of the program and organizing committee members of this conference, we th are pleased to present you with the proceedings of the 12 Asia-Pacific Computer Systems Architecture Conference (ACSAC 2007), which was hosted in Seoul, Korea on August 23-25, 2007. This conference has traditionally been a forum for leading researchers in the Asian, American and Oceanian regions to share recent progress and the latest results in both architectural and system issues. In the past few years the c- ference has become more international in the sense that the geographic origin of p- ticipants has become broader to include researchers from all around the world, incl- ing Europe and the Middle East. This year, we received 92 paper submissions. Each submission was reviewed by at least three primary reviewers along with up to three secondary reviewers. The total number of completed reviews reached 333, giving each submission 3.6 reviews on average. All the reviews were carefully examined during the paper selection process, and finally 26 papers were accepted, resulting in an acceptance rate of about 28%. The selected papers encompass a wide range of topics, with much emphasis on hardware and software techniques for state-of-the-art multicore and multithreaded architectures.

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